JosephTremoulet added a comment. FWIW, I tried running the test in an SUSE 15.2 docker container (on an Ubuntu 18.04 host), and here's what I'm seeing. `raise` and `abort` indeed do not indicate that they had the `S` set in the augmentation:
(lldb) bt * thread #1, name = 'a.out', stop reason = breakpoint 2.1 * frame #0: 0x000000000040064b a.out`handler(sig=6) at main.c:7:5 frame #1: 0x00007ffff71245a0 libc.so.6`__restore_rt frame #2: 0x00007ffff7124520 libc.so.6`raise + 272 frame #3: 0x00007ffff7125b01 libc.so.6`abort + 337 frame #4: 0x0000000000400679 a.out`abort_caller at main.c:12:5 frame #5: 0x00000000004006d3 a.out`main at main.c:23:5 frame #6: 0x00007ffff710f34a libc.so.6`__libc_start_main + 234 frame #7: 0x000000000040058a a.out`_start at start.S:120 (lldb) image show-unwind -n __restore_rt UNWIND PLANS for ld-2.26.so`__restore_rt (start addr 0x7ffff7df2270) This function's name is listed by the platform as a trap handler. Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI' Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI' Assembly language inspection UnwindPlan: This UnwindPlan originally sourced from assembly insn profiling This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: yes. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [ld-2.26.so.PT_LOAD[0]..text + 107856-0x000000000001a560) row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] eh_frame UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI This UnwindPlan is sourced from the compiler: yes. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: yes. Address range of this UnwindPlan: [ld-2.26.so.PT_LOAD[0]..text + 107855-0x000000000001a559) row[0]: 0: CFA=DW_OP_breg7 +160, DW_OP_deref => rax=[DW_OP_breg7 +144] rdx=[DW_OP_breg7 +136] rcx=[DW_OP_breg7 +152] rbx=[DW_OP_breg7 +128] rsi=[DW_OP_breg7 +112] rdi=[DW_OP_breg7 +104] rbp=[DW_OP_breg7 +120] rsp=[DW_OP_breg7 +160] r8=[DW_OP_breg7 +40] r9=[DW_OP_breg7 +48] r10=[DW_OP_breg7 +56] r11=[DW_OP_breg7 +64] r12=[DW_OP_breg7 +72] r13=[DW_OP_breg7 +80] r14=[DW_OP_breg7 +88] r15=[DW_OP_breg7 +96] rip=[DW_OP_breg7 +168] Arch default UnwindPlan: This UnwindPlan originally sourced from x86_64 default unwind plan This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. row[0]: 0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] Arch default at entry point UnwindPlan: This UnwindPlan originally sourced from x86_64 at-func-entry default This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: not specified. This UnwindPlan is for a trap handler function: not specified. row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] UNWIND PLANS for libc.so.6`__restore_rt (start addr 0x7ffff71245a0) This function's name is listed by the platform as a trap handler. Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI' Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI' Assembly language inspection UnwindPlan: This UnwindPlan originally sourced from assembly insn profiling This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: yes. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88624-0x0000000000015a40) row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] eh_frame UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI This UnwindPlan is sourced from the compiler: yes. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: yes. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88623-0x0000000000015a39) row[0]: 0: CFA=DW_OP_breg7 +160, DW_OP_deref => rax=[DW_OP_breg7 +144] rdx=[DW_OP_breg7 +136] rcx=[DW_OP_breg7 +152] rbx=[DW_OP_breg7 +128] rsi=[DW_OP_breg7 +112] rdi=[DW_OP_breg7 +104] rbp=[DW_OP_breg7 +120] rsp=[DW_OP_breg7 +160] r8=[DW_OP_breg7 +40] r9=[DW_OP_breg7 +48] r10=[DW_OP_breg7 +56] r11=[DW_OP_breg7 +64] r12=[DW_OP_breg7 +72] r13=[DW_OP_breg7 +80] r14=[DW_OP_breg7 +88] r15=[DW_OP_breg7 +96] rip=[DW_OP_breg7 +168] Arch default UnwindPlan: This UnwindPlan originally sourced from x86_64 default unwind plan This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. row[0]: 0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] Arch default at entry point UnwindPlan: This UnwindPlan originally sourced from x86_64 at-func-entry default This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: not specified. This UnwindPlan is for a trap handler function: not specified. row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] (lldb) image show-unwind -n raise UNWIND PLANS for libc.so.6`raise (start addr 0x7ffff7124410) Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI plus augmentation from assembly parsing' Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI' Assembly language inspection UnwindPlan: This UnwindPlan originally sourced from assembly insn profiling This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: yes. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3) row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] row[1]: 1: CFA=rsp+16 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] row[2]: 25: CFA=rsp+288 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] row[3]: 301: CFA=rsp+16 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] row[4]: 302: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] row[5]: 303: CFA=rsp+288 => rbx=[CFA-16] rsp=CFA+0 rip=[CFA-8] eh_frame UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI This UnwindPlan is sourced from the compiler: yes. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3) row[0]: 0: CFA=rsp +8 => rip=[CFA-8] row[1]: 1: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] row[2]: 25: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] row[3]: 301: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] row[4]: 302: CFA=rsp +8 => rbx=[CFA-16] rip=[CFA-8] row[5]: 304: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] eh_frame augmented UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI plus augmentation from assembly parsing This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: yes. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 88224-0x00000000000159e3) row[0]: 0: CFA=rsp +8 => rip=[CFA-8] row[1]: 1: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] row[2]: 25: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] row[3]: 301: CFA=rsp+16 => rbx=[CFA-16] rip=[CFA-8] row[4]: 302: CFA=rsp +8 => rbx=[CFA-16] rip=[CFA-8] row[5]: 304: CFA=rsp+288 => rbx=[CFA-16] rip=[CFA-8] Arch default UnwindPlan: This UnwindPlan originally sourced from x86_64 default unwind plan This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. row[0]: 0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] Arch default at entry point UnwindPlan: This UnwindPlan originally sourced from x86_64 at-func-entry default This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: not specified. This UnwindPlan is for a trap handler function: not specified. row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] (lldb) image show-unwind -n abort UNWIND PLANS for libc.so.6`abort (start addr 0x7ffff71259b0) Asynchronous (not restricted to call-sites) UnwindPlan is 'eh_frame CFI' Synchronous (restricted to call-sites) UnwindPlan is 'eh_frame CFI' Assembly language inspection UnwindPlan: This UnwindPlan originally sourced from assembly insn profiling This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: yes. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090) row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] row[1]: 7: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] row[2]: 93: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] row[3]: 105: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] row[4]: 315: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] row[5]: 327: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] row[6]: 406: CFA=rsp+432 => rsp=CFA+0 rip=[CFA-8] row[7]: 418: CFA=rsp+304 => rsp=CFA+0 rip=[CFA-8] eh_frame UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI This UnwindPlan is sourced from the compiler: yes. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090) row[0]: 0: CFA=rsp +8 => rip=[CFA-8] row[1]: 7: CFA=rsp+304 => rip=[CFA-8] row[2]: 93: CFA=rsp+432 => rip=[CFA-8] row[3]: 105: CFA=rsp+304 => rip=[CFA-8] row[4]: 315: CFA=rsp+432 => rip=[CFA-8] row[5]: 327: CFA=rsp+304 => rip=[CFA-8] row[6]: 406: CFA=rsp+432 => rip=[CFA-8] row[7]: 418: CFA=rsp+304 => rip=[CFA-8] eh_frame augmented UnwindPlan: This UnwindPlan originally sourced from eh_frame CFI This UnwindPlan is sourced from the compiler: yes. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. Address range of this UnwindPlan: [libc.so.6.PT_LOAD[0]..text + 93760-0x0000000000017090) row[0]: 0: CFA=rsp +8 => rip=[CFA-8] row[1]: 7: CFA=rsp+304 => rip=[CFA-8] row[2]: 93: CFA=rsp+432 => rip=[CFA-8] row[3]: 105: CFA=rsp+304 => rip=[CFA-8] row[4]: 315: CFA=rsp+432 => rip=[CFA-8] row[5]: 327: CFA=rsp+304 => rip=[CFA-8] row[6]: 406: CFA=rsp+432 => rip=[CFA-8] row[7]: 418: CFA=rsp+304 => rip=[CFA-8] Arch default UnwindPlan: This UnwindPlan originally sourced from x86_64 default unwind plan This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: no. This UnwindPlan is for a trap handler function: no. row[0]: 0: CFA=rbp+16 => rbp=[CFA-16] rsp=CFA+0 rip=[CFA-8] Arch default at entry point UnwindPlan: This UnwindPlan originally sourced from x86_64 at-func-entry default This UnwindPlan is sourced from the compiler: no. This UnwindPlan is valid at all instruction locations: not specified. This UnwindPlan is for a trap handler function: not specified. row[0]: 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8] Repository: rLLDB LLDB CHANGES SINCE LAST ACTION https://reviews.llvm.org/D86417/new/ https://reviews.llvm.org/D86417 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits