On Wed, Sep 02, 2015 at 04:36:09PM +0100, Pranith Kumar wrote: > On Wed, Sep 2, 2015 at 11:23 AM, Pranith Kumar <bobby.pr...@gmail.com> wrote: > > On 09/02/2015 05:59 AM, Will Deacon wrote: > >> I just thought it was worth making this point, because it is prohibited > >> in SC and I don't want people to think that our RELEASE/ACQUIRE operations > >> are SC (even though they happen to be on arm64). > > > > This is interesting information. Does that mean that the following patch > > should work? (I am not proposing to use it, just trying to understand if > > REL+ACQ will act as a full barrier on ARM64, which you say it does). > > > > Thanks, > > Pranith. > > > > diff --git a/arch/arm64/include/asm/cmpxchg.h > > b/arch/arm64/include/asm/cmpxchg.h > > index d8c25b7..14a1b35 100644 > > --- a/arch/arm64/include/asm/cmpxchg.h > > +++ b/arch/arm64/include/asm/cmpxchg.h > > @@ -68,8 +68,7 @@ static inline unsigned long __xchg(unsigned long x, > > volatile void *ptr, int size > > BUILD_BUG(); > > } > > > > - smp_mb(); > > - return ret; > > + return smp_load_acquire(ret); > > I meant 'smp_load_acquire(&ret);'
Yes, I think that would work on arm64, but it's not portable between architectures. Will _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
