On Fri, Aug 28, 2015 at 08:06:14PM +0800, Boqun Feng wrote:
> Hi Peter,
>
> On Fri, Aug 28, 2015 at 12:48:54PM +0200, Peter Zijlstra wrote:
> > On Fri, Aug 28, 2015 at 10:48:17AM +0800, Boqun Feng wrote:
> > > +/*
> > > + * Since {add,sub}_return_relaxed and xchg_relaxed are implemented with
> > > + * a "bne-" instruction at the end, so an isync is enough as a acquire
> > > barrier
> > > + * on the platform without lwsync.
> > > + */
> > > +#ifdef CONFIG_SMP
> > > +#define smp_acquire_barrier__after_atomic() \
> > > + __asm__ __volatile__(PPC_ACQUIRE_BARRIER : : : "memory")
> > > +#else
> > > +#define smp_acquire_barrier__after_atomic() barrier()
> > > +#endif
> > > +#define arch_atomic_op_acquire(op, args...)
> > > \
> > > +({
> > > \
> > > + typeof(op##_relaxed(args)) __ret = op##_relaxed(args); \
> > > + smp_acquire_barrier__after_atomic(); \
> > > + __ret; \
> > > +})
> > > +
> > > +#define arch_atomic_op_release(op, args...)
> > > \
> > > +({
> > > \
> > > + smp_lwsync(); \
> > > + op##_relaxed(args); \
> > > +})
> >
> > Urgh, so this is RCpc. We were trying to get rid of that if possible.
> > Lets wait until that's settled before introducing more of it.
> >
> > lkml.kernel.org/r/20150820155604.gb24...@arm.com
>
> OK, get it. Thanks.
>
> So I'm not going to introduce these arch specific macros, I think what I
> need to implement are just _relaxed variants and cmpxchg_acquire.Ah.. just read through the thread you mentioned, I might misunderstand you, probably because I didn't understand RCpc well.. You are saying that in a RELEASE we -might- switch from smp_lwsync() to smp_mb() semantically, right? I guess this means we -might- switch from RCpc to RCsc, right? If so, I think I'd better to wait until we have a conclusion for this. Thank you for your comments! Regards, Boqun
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