On Thu, 2014-02-06 at 13:28 -0600, Tom Musta wrote: > My read is consistent with Torsten's ... this looks like a bad idea. > > Look at the RTL for sthcx. on page 692 (Power ISA V2.06) and you will > see this: > > if RESERVE then > if RESERVE_LENGTH = 2 then > ... > else > undefined_case <- 1 > else > ... > > A legal implementation might never perform the store.
This is an area where we definitely want to check with the implementors and if the implementations happen to do what we want (they likely do), get the architecture changed for future chips and use it anyway. There's a a *significant* benefit in avoiding an atomic operation in the unlock case . The reservation mechanism being based on a granule that is generally a cache line, I doubt implementations will ever check the actual access size, but we need to double check. Cheers, Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
