On 06/14/2013 02:15:58 AM, Minghuan Lian wrote:
For MPIC v4.3 MSIIR supports 8 MSI registers and MSIIR1 supports 16 MSI registers, but uses different IBS and SRS shift. For the first register, when using MSIIR we will get the irqs 0x0 0x1 0x2 ...0x1f, but when using MSIIR1, the irqs are 0x0 0x10 0x20 ... 0x1f0 It is hard to describe the available irqs using property 'msi-available-ranges'. The patch removes this property.
Only remove it from mpic 4.3. And since you introduced qoriq-mpic4.3.dtsi earlier in the patchset, why didn't you just avoid adding it then?
-Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
