On Wed, Nov 09, 2011 at 09:27:02AM -0600, Zang Roy-R61911 wrote: > > -----Original Message----- > > From: Wood Scott-B07421 > > Sent: Wednesday, November 09, 2011 0:54 AM > > To: Zang Roy-R61911 > > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org > > Subject: Re: [PATCH] powerpc/p1023: set IRQ[4:6, 11] to high level > > sensitive for > > PCIe > > > > Just a note that there's magic to allow the PCIe block to output these > > interrupts as either active-high or active-low, depending on how they're > > configured at the mpic. > I do not think there is any magic. > On the contrary, it is the mpic/device tree needs to comply with the hardware > setting for the interrupt polarity.
The magic is that the PCIe block can generate the interrupt in either polarity depending on the MPIC setting (or perhaps it bases it on sampling the pin status during/after reset, but that seems fragile). > > > IRQ 4,5,6, 11 are internally tie to low by silicon. To use these > > > interrupts > > for PCIe, they need to set high level sensitive. > > > It is clear enough for this patch. > > > > It's odd enough that I felt the need to go reading through the docs to > > see why such a thing would work at all. > If you consider the normal case, the shared irq pulls up, the PCIe interrupt > set to low level sensitive. Anything odd? The oddity is that active-high works at all for a PCI interrupt, and that not all the PCIe interrupts have the same polarity. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
