On Fri, 2009-11-20 at 11:21 +0100, Joakim Tjernlund wrote: > Various kernel asm modifies SRR0/SRR1 just before executing > a rfi. If such code crosses a page boundary you risk a TLB miss > which will clobber SRR0/SRR1. Avoid this by always pinning > kernel instruction TLB space. > > Signed-off-by: Joakim Tjernlund <joakim.tjernl...@transmode.se> > --- > arch/powerpc/kernel/head_8xx.S | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S > index a9f1ace..e70503d 100644 > --- a/arch/powerpc/kernel/head_8xx.S > +++ b/arch/powerpc/kernel/head_8xx.S > @@ -705,7 +705,7 @@ start_here: > */ > initial_mmu: > tlbia /* Invalidate all TLB entries */ > -#ifdef CONFIG_PIN_TLB > +#if 1 /* CONFIG_PIN_TLB */ > lis r8, mi_rs...@h > ori r8, r8, 0x1c00 > #else
Not nice. Either remove the config option or make sure all those code sequences are appropriately aligned so it doesn't happen. I recommend the later :-) I'll apply the other patches. Cheers, Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
