On Tue, 2009-01-20 at 10:31 -0600, Scott Wood wrote:
> On Tue, Jan 20, 2009 at 11:56:58AM +0100, Jean-Michel Hautbois wrote:
> > Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
> > Kernel command line: root=/dev/ram rw
> > PID hash table entries: 256 (order: 8, 1024 bytes)
> > time_init: decrementer frequency = 25.000000 MHz
> > time_init: processor frequency = 400.000000 MHz
> > clocksource: timebase mult[a000000] shift[22] registered
> > clockevent: decrementer mult[666] sh�
>
> That looks like something is failing when the real (as opposed to early
> debug) serial driver starts. Try commenting out the call to cpm_setbrg
> in drivers/serial/cpm_uart/cpm_uart_cpm2.h; if that makes a difference,
> there's something wrong with the brg node in the device tree.
I used the mpc8272ads as the basis for my mpc8265 port to 2.6 and found
that to get the serial ports to clock correctly, I needed to add
"clock-frequency" to the brg node in the DTS file.
Here is mine:
b...@119f0 {
compatible = "mpc8265-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <0x119f0 0x10 0x115f0 0x10>;
clock-frequency = <0>;
};
Of course, you also need to update your ft_blob_update() in u-boot to
fill in the correct value.
The default values in the cpm2 code did not work for my system clock
configuration.
--
Jeff Angielski
The PTR Group
www.theptrgroup.com
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