On Wed, Jan 21, 2009 at 06:15:26PM -0800, Daniel Ng99 wrote:
> So the brg node looks like this-
>
> b...@119f0 {
> compatible = "fsl,mpc8272-brg",
> "fsl,cpm2-brg";
> reg = <0x119f0 0x10 0x115f0 0x10>;
> clock-frequency = <0>;
>
> But aren't the BRG registers 32 bits, so shouldn't we use?:
>
> reg = <0x119f0 0x20 0x115f0 0x20>;
reg lengths are bytes, not bits.
> -either way, changing these values doesn't seem to make a difference in my
> board's behaviour. Why?
The change above told it that the system has 16 BRGs rather than 8.
However, this change did not affect the position of the BRG1 register.
> Regarding the following line in the ser...@11a00 node:
>
> fsl,cpm-brg = <1>;
>
> -If I change the above number to anything other than 1 (even nonsense like
> '99') then it also seems to work. Why?
Because BRG1 is already set up by u-boot.
> Adding 'clock-frequency = <0>;' to the brg node doesn't seem to make a
> difference to my board's behaviour.
Try setting it to the actual BRG clock.
-Scott
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