On Mon, 2008-12-15 at 17:11 -0800, Trent Piepho wrote: > Shame, as it provides a huge speed up. I suppose an alternative would be > to map the chip twice at different physical addresses, by just configuring > the chip select to be twice the size it should be, and giving them > different cacheability.
Nice trick. That would probably work. > Or changing the mapping for writes and then changing it back. It wouldn't > be necessary to change the whole thing, just the page being written to. Right though changing mappings can be expensive. It might be worth looking at using fixmap for that tho, which is the fastest way to setup and tear down mappings, especially since we can (though we don't today) implement a bypass on those to directly load the TLB. Cheers, Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
