On Mon, 15 Dec 2008 10:25:18 -0800 Trent Piepho <tpie...@freescale.com> wrote:
> The MTD system supports operation where a direct mapped flash chip is > mapped twice. The normal mapping is a standard ioremap(), which is > non-cached and guarded on powerpc. The second mapping is used only for > reads and can be cached and non-guarded. Currently, only the pxa2xx > mapping driver makes use of this feature. This patch adds support to the > physmap_of driver on PPC32 platforms for this cached mapping mode. > > Because the flash chip doesn't participate in the cache coherency protocol, > it's necessary to invalidate the cache for parts of flash that are modified > with a program or erase operation. This is platform specific, for instance > the pxa2xx driver uses an ARM specific function. This patch adds > invalidate_dcache_icache_range() for PPC32 and uses it. Because of XIP, > it's entirely possible that the flash might be in the icache(*), so the > existing invalidate_dcache_range() function isn't enough. > > Of course, a cached mapping can increase performance if the data is read > from cache instead of flash. But less obvious is that it can provide a > significant performance increase for cold-cache reads that still come from > flash. It allows efficient back-to-back reads and if the flash chip & > controller support page burst mode, it allows that to be used as well. > > The figures are for *cold-cache* read performance, measured on a Freescale > MPC8572 controlling a Spansion S29GL064N NOR flash chip. With and without > the flash being mapped cached and with and without the localbus controller > being programmed to use page burst mode: > > Non-cached, w/o bursts: 13.61 MB/s > Non-cached, w/ bursts: 13.61 MB/s > Cached, w/o bursts: 16.75 MB/s 23% increase > Cached, w/ bursts: 44.79 MB/s 229% increase! > > Even without any cache hits, the cached mapping provides a significant > increase in performance via improved bus utilization. Enabling burst > transfers is even more significant. > > (*) The MTD device's ->point() method, which is the mechanism for > supporting mmap and XIP, only allows for mmapping the uncached region. So > you can't actually XIP anything in the cache. But this could be fixed. > > Signed-off-by: Trent Piepho <tpie...@freescale.com> Did you actually change anything in this version when compared to the version you sent out last week? If not, is there a reason you sent it again without flagging it as a resend? (Hint, the MTD community reviews patches slowly. No comments for a week is normal.) josh _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
