On 08/03/2022, 14:50:40, Nicholas Piggin wrote: > On 64-bit, PACA is saved in a SPRG so it does not need to be saved on > stack. We also don't need to mask off the top bits for real mode > addresses because the architecture does this for us. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Laurent Dufour <lduf...@linux.ibm.com> > --- > arch/powerpc/kernel/rtas_entry.S | 13 ++++--------- > 1 file changed, 4 insertions(+), 9 deletions(-) > > diff --git a/arch/powerpc/kernel/rtas_entry.S > b/arch/powerpc/kernel/rtas_entry.S > index 08eb731f08b8..5f65ea4436c6 100644 > --- a/arch/powerpc/kernel/rtas_entry.S > +++ b/arch/powerpc/kernel/rtas_entry.S > @@ -62,10 +62,9 @@ _GLOBAL(enter_rtas) > > /* Because RTAS is running in 32b mode, it clobbers the high order half > * of all registers that it saves. We therefore save those registers > - * RTAS might touch to the stack. (r0, r3-r13 are caller saved) > + * RTAS might touch to the stack. (r0, r3-r12 are caller saved) > */ > SAVE_GPR(2, r1) /* Save the TOC */ > - SAVE_GPR(13, r1) /* Save paca */ > SAVE_NVGPRS(r1) /* Save the non-volatiles */ > > mfcr r4 > @@ -129,15 +128,14 @@ rtas_return_loc: > mtmsrd r6 > > /* relocation is off at this point */ > - GET_PACA(r4) > - clrldi r4,r4,2 /* convert to realmode address */ > + GET_PACA(r13) > > bcl 20,31,$+4 > 0: mflr r3 > ld r3,(1f-0b)(r3) /* get &rtas_restore_regs */ > > - ld r1,PACAR1(r4) /* Restore our SP */ > - ld r4,PACASAVEDMSR(r4) /* Restore our MSR */ > + ld r1,PACAR1(r13) /* Restore our SP */ > + ld r4,PACASAVEDMSR(r13) /* Restore our MSR */ > > mtspr SPRN_SRR0,r3 > mtspr SPRN_SRR1,r4 > @@ -153,11 +151,8 @@ _ASM_NOKPROBE_SYMBOL(rtas_return_loc) > rtas_restore_regs: > /* relocation is on at this point */ > REST_GPR(2, r1) /* Restore the TOC */ > - REST_GPR(13, r1) /* Restore paca */ > REST_NVGPRS(r1) /* Restore the non-volatiles */ > > - GET_PACA(r13) > - > ld r4,_CCR(r1) > mtcr r4 > ld r5,_CTR(r1)
