On 08/03/2022, 14:50:37, Nicholas Piggin wrote:
> Disable MSR[EE] in C code rather than asm.
>
> Signed-off-by: Nicholas Piggin <npig...@gmail.com>
FWIW,
Reviewed-by: Laurent Dufour <lduf...@linux.ibm.com>
> ---
> arch/powerpc/kernel/rtas.c | 4 ++++
> arch/powerpc/kernel/rtas_entry.S | 17 +----------------
> 2 files changed, 5 insertions(+), 16 deletions(-)
>
> diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
> index 733e6ef36758..6b5892d6a56b 100644
> --- a/arch/powerpc/kernel/rtas.c
> +++ b/arch/powerpc/kernel/rtas.c
> @@ -49,6 +49,10 @@ void enter_rtas(unsigned long);
>
> static inline void do_enter_rtas(unsigned long args)
> {
> + BUG_ON(!irqs_disabled());
> +
> + hard_irq_disable(); /* Ensure MSR[EE] is disabled on PPC64 */
> +
> enter_rtas(args);
>
> srr_regs_clobbered(); /* rtas uses SRRs, invalidate */
> diff --git a/arch/powerpc/kernel/rtas_entry.S
> b/arch/powerpc/kernel/rtas_entry.S
> index 6fa10eb49a9c..45fa661c2ff6 100644
> --- a/arch/powerpc/kernel/rtas_entry.S
> +++ b/arch/powerpc/kernel/rtas_entry.S
> @@ -24,8 +24,6 @@ _GLOBAL(enter_rtas)
> lwz r4,RTASBASE(r4)
> mfmsr r9
> stw r9,8(r1)
> - LOAD_REG_IMMEDIATE(r0,MSR_KERNEL)
> - mtmsr r0 /* disable interrupts so SRR0/1 don't get trashed */
> li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
> mtlr r6
> stw r1, THREAD + RTAS_SP(r2)
> @@ -87,20 +85,7 @@ _GLOBAL(enter_rtas)
> li r0,0
> mtcr r0
>
> -#ifdef CONFIG_BUG
> - /* There is no way it is acceptable to get here with interrupts enabled,
> - * check it with the asm equivalent of WARN_ON
> - */
> - lbz r0,PACAIRQSOFTMASK(r13)
> -1: tdeqi r0,IRQS_ENABLED
> - EMIT_WARN_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
> -#endif
> -
> - /* Hard-disable interrupts */
> mfmsr r6
> - rldicl r7,r6,48,1
> - rotldi r7,r7,16
> - mtmsrd r7,1
>
> /* Unfortunately, the stack pointer and the MSR are also clobbered,
> * so they are saved in the PACA which allows us to restore
> @@ -124,7 +109,7 @@ _GLOBAL(enter_rtas)
> andc r6,r0,r9
>
> __enter_rtas:
> - sync /* disable interrupts so SRR0/1 */
> + sync /* disable RI so SRR0/1 */
> mtmsrd r0 /* don't get trashed */
>
> LOAD_REG_ADDR(r4, rtas)
