StoreEOI is activated by default on platforms supporting the feature
(POWER10) and will be used as soon as firmware advertises its
availability. The kernel parameter provides a way to deactivate its
use. It can be still be reactivated through debugfs.

Signed-off-by: Cédric Le Goater <c...@kaod.org>
---
 arch/powerpc/sysdev/xive/common.c               | 13 +++++++++++++
 Documentation/admin-guide/kernel-parameters.txt |  6 ++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/powerpc/sysdev/xive/common.c 
b/arch/powerpc/sysdev/xive/common.c
index 11e2aaa13965..67fd3a306369 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch/powerpc/sysdev/xive/common.c
@@ -1713,6 +1713,19 @@ static int __init xive_off(char *arg)
 }
 __setup("xive=off", xive_off);
 
+static int __init xive_store_eoi_cmdline(char *arg)
+{
+       if (!arg)
+               return -EINVAL;
+
+       if (strncmp(arg, "off", 3) == 0) {
+               pr_info("StoreEOI disabled on kernel command line\n");
+               xive_store_eoi = false;
+       }
+       return 0;
+}
+__setup("xive.store-eoi=", xive_store_eoi_cmdline);
+
 #ifdef CONFIG_DEBUG_FS
 static void xive_debug_show_ipi(struct seq_file *m, int cpu)
 {
diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index 43dc35fe5bc0..10fa093251e8 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -6387,6 +6387,12 @@
                                  controller on both pseries and powernv
                                  platforms. Only useful on POWER9 and above.
 
+       xive.store-eoi=off      [PPC]
+                       By default on POWER10 and above, the kernel will use
+                       stores for EOI handling when the XIVE interrupt mode
+                       is active. This option allows the XIVE driver to use
+                       loads instead, as on POWER9.
+
        xhci-hcd.quirks         [USB,KNL]
                        A hex value specifying bitmask with supplemental xhci
                        host controller quirks. Meaning of each bit can be
-- 
2.31.1

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