We found the problem when porting code from Linux 2.4 to 2.6, where a
user space application maps a 1 MByte region of DRAM with the O_SYNC
flag to communicate with an internal core that shares access to the
DRAM but does not have any cache snooping logic.

In 2.4 the mem driver honors the O_SYNC flag and makes the requested
memory
memory non-cached so that writes from user space are immediately
available
to the second core.

If you only need to write from the core running Linux, and never
read the memory back, and the secondary core never writes the memory,
your userland program can simply do dcbst on it after it wrote it.

Otherwise, if your CPU has BAT registers, you could use those to
force that memory region as non-cacheable (be careful, BATs are not
allowed to overlap each other).

If these things won't work for you, you need to do some simple device
driver, and do non-coherent DMA from it (you can view the secondary
core as an I/O device like any other).


Segher

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