Kumar Gala writes: > We need to have unique transfer_to_handler paths for each exception level > that is supported. We need to use the proper xSRR0/1 depending on which > exception level the interrupt was from. The macro conversion lets up > templatize this code path.
It seems to me that this implies you are assuming that you will never ever get a synchronous normal interrupt such as a TLB miss while you are in a critical or machine check handler. Wouldn't it be better and safer to have the exception prolog for critical interrupts save SRR0/1 in the stack frame, and have the prolog for machine checks save SRR0/1 and CSRR0/1 likewise? Paul. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
