On Wed, May 20, 2015 at 10:55:20AM +0200, Ingo Molnar wrote:
> Does it use it to decide how 'deep' a sleep it will go into, i.e.
> larger timeouts cause longer entry and exit latencies?
That's what the HLT thing does. Cores go into C1 and then at some point
(hysteresis, etc) the whole core complex enters C1E.
The MWAIT* should be used for only shorter sleeps as it remains in C1.
IMHO, of course.
But the problem there is another: what happens if the timeout fires,
you wake up and see that you can remain idle? Do HLT? Do another MWAITX
round?
This means you have an additional unnecessary wakeup which costs.
> I suppose it's also the case that if an interrupt arrives _before_ the
> expected timeout then MWAITX will try to exit immediately, it won't
> wait until the timeout, right?
I'd assume so - I mean, it must, right.
BUT!, in talking to Andy about it last night on IRC, he pointed out
that when using acpi_idle, we never come to calling x86_idle() and from
looking quickly at cpuidle_idle_call(), that still might be the case as
we go to use_default only when there's an error with the cpuidle driver
or so.
So Rui, before you go and do more work on it, you should probably
analyze what cpuidle exactly does (if you haven't done so yet). And on
AMD we do use acpi_idle - at least on my F15h box that is the case:
$ grep . /sys/devices/system/cpu/cpuidle/current_*
/sys/devices/system/cpu/cpuidle/current_driver:acpi_idle
/sys/devices/system/cpu/cpuidle/current_governor_ro:menu
Thanks.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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