Some architectures (for us, AMD Family 16h) allow for "don't care" bit mask to further qualify a hardware breakpoint address, in order to trap on range of addresses. Update perf uapi to add bp_addr_mask field.
Signed-off-by: Jacob Shin <jacob.s...@amd.com> --- include/uapi/linux/perf_event.h | 5 ++++- kernel/events/hw_breakpoint.c | 9 +++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index fb104e5..e22e1d1 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -286,7 +286,10 @@ struct perf_event_attr { __u64 config1; /* extension of config */ }; union { - __u64 bp_len; + struct { + __u32 bp_len; + __u32 bp_addr_mask; + }; __u64 config2; /* extension of config1 */ }; __u64 branch_sample_type; /* enum perf_branch_sample_type */ diff --git a/kernel/events/hw_breakpoint.c b/kernel/events/hw_breakpoint.c index a64f8ae..c454880 100644 --- a/kernel/events/hw_breakpoint.c +++ b/kernel/events/hw_breakpoint.c @@ -385,6 +385,11 @@ int dbg_release_bp_slot(struct perf_event *bp) return 0; } +__weak int arch_validate_hwbkpt_addr_mask(struct perf_event *bp) +{ + return bp->attr.bp_addr_mask == 0; +} + static int validate_hw_breakpoint(struct perf_event *bp) { int ret; @@ -393,6 +398,10 @@ static int validate_hw_breakpoint(struct perf_event *bp) if (ret) return ret; + ret = arch_validate_hwbkpt_addr_mask(bp); + if (ret) + return ret; + if (arch_check_bp_in_kernelspace(bp)) { if (bp->attr.exclude_kernel) return -EINVAL; -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/