[PATCH 02/15] ARM: dts: qcom: sdx55: Add support for APCS block

[Manivannan Sadhasivam]

The APCS block on SDX55 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
---
 arch/arm/boot/dts/qcom-sdx55.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi 
b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 41c90f598359..8112a5283ce2 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -360,6 +360,15 @@ a7pll: clock@17808000 {
                        #clock-cells = <0>;
                };
 
+               apcs: mailbox@17810000 {
+                       compatible = "qcom,sdx55-apcs-gcc", "syscon";
+                       reg = <0x17810000 0x2000>;
+                       #mbox-cells = <1>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
+                       clock-names = "ref", "pll", "aux";
+                       #clock-cells = <0>;
+               };
+
                watchdog@17817000 {
                        compatible = "qcom,apss-wdt-sdx55", "qcom,kpss-wdt";
                        reg = <0x17817000 0x1000>;
-- 
2.25.1