Andy, Fabio,
Does the following describe the mainline situation?
Please correct if not.
1. imx6 ethernet ref_clk can be generated internally (by imx6) or
externally (by PHY or oscillator on PCB)
2. if internal, fec's "ptp" clock in devicetree should be
<&clks IMX6QDL_CLK_ENET_REF>
3. if external, fec's "ptp" clock should be that external clock,
see 810c0ca879098 ("ARM: imx6q: support ptp and rmii clock from pad")
4. sabresd devicetree describes "ptp" clock as IMX6QDL_CLK_ENET_REF,
although it's externally supplied (by PHY). This is incorrect.
5. nevertheless sabresd will work, because FEC driver can still work
when the PTP clock in devicetree is different from supplied PTP clock
6. sabresd plus believes FEC is clocked internally, so flips the bit
which routes the ptp clock internally
7. this breaks sabresd plus, as default internal clock is unsuitable
8. sabresd is sample board, so all boards based on sabresd may have
the same issue, and break
Solution 1:
- describe sabresd ptp clock correctly in devicetree
- "clean/correct" solution
- may break other imx6q plus boards in mainline
- may break out-of-tree (private) imx6q plus devicetrees based on
sabresd
Solution 2:
- on plus, never route PTP clock internally by default
use a devicetree property instead
- complex solution, hard to understand if newcomer
- prevents sabresd / clones breakage
Solution 3:
- set sabresd ptp clock freq to same as externally supplied clock
- may still break designs based on sabresd
- hard to understand what's actually happening
Other solutions??
