Andy, Fabio, On Tue, Jun 30, 2020 at 2:36 AM Andy Duan <fugang.d...@nxp.com> wrote: > > Sven, no matter PHY supply 125Mhz clock to pad or not, GPR5[9] is to select > RGMII > gtx clock source from: > - 0 Clock from pad > - 1 Clock from PLL > > Since i.MX6QP can internally supply clock to MAC, we can set GPR5[9] bit by > default.
That's true. But on the sabresd I notice that the PHY's ref_clk output is from CLK_25M. The default ref_clk freq for that PHY is 25 MHz, and I don't see anyone change the default in the devicetree. I also see that a 25 MHz crystal is fitted, which also suggests 25 Mhz output. On the imx6, the default ref_clk frequency from ANATOP is 50Mhz. I don't see anyone change that default in the devicetree either. So is it possible that, when we switch GPR5[9] on, the external 25MHz clock is replaced by the internal 50MHz clock? If so, I'm not sure it'll work...?
