On Sat, 9 Dec 2000, Ivan Kokshaysky wrote:
> > It is used from pci_assign_unassigned_resources. iirc, its just that
> > x86 doesn't call this function.
> Yes, only alpha, arm and mips are using that code.
Ok, thanks Ivan/Russell for clearing this up for me.
If/When x86 (or all?) architectures use this, will it make sense to
remove the PCI space cache line setting from drivers ?
Or is there borked hardware out there that require drivers to say
"This cacheline size must be xxx bytes, anything else will break" ?
regards,
Davej.
--
| Dave Jones <[EMAIL PROTECTED]> http://www.suse.de/~davej
| SuSE Labs
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