Your work, as like the other devs', looks awesome. Before the final merge, could you make the via placement better via avoiding from the pads totally (even they have the same net name)? Without special "in pad via" treatment (which is expensive), they could cause solder paste losses and assembly issues.
He's right. Its sort of okay for a TH pad, its not okay for a small smd pad, and it may be okay for a heatsinked to a copper plane pad. Its better to directly avoid pad-via collisions, because when you want a via in pad (LDO heatsinking for example) its something you do manually to have in mind solder losses through the vias. Great, great work. This patch, solves what I'm missing in KiCad for a long time. This is the final nail on the Eagle's coffin in our company :) Thanks. /// Murat On 03/25/2017 02:21 PM, Heikki Pulkkinen wrote: Hi, Any comments, questions! https://youtu.be/CQC6XMTGxkk Heikki _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
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