zhanchangbao-sanechips commented on code in PR #2639:
URL: https://github.com/apache/orc/pull/2639#discussion_r3426323960
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c++/src/CpuInfoUtil.cc:
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@@ -374,6 +379,17 @@ namespace orc {
return flags;
}
+#if defined(CPUINFO_ARCH_RISCV)
+ int64_t LinuxParseRiscvIsa(const std::string& values) {
+ int64_t flags = 0;
+ // RISC-V ISA string like "rv64imafdcv" contains 'v' for vector extension
+ if (values.find('v') != std::string::npos) {
Review Comment:
Thanks for the reminder. I've updated the implementation to use
getauxval(AT_HWCAP) to detect HWCAP_RISCV_RVV instead of parsing the ISA string.
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