On Thu, 2015-03-19 at 13:53 -0700, Jesse Barnes wrote:
> On 03/17/2015 02:40 AM, Imre Deak wrote:
> > The checks for PLL enabled state on CPU ports are valid only on GMCH
> > platforms but atm we'd also call them on non-PCH-split/non-GMCH
> > platforms like BXT, triggering false warnings. Until the proper check is
> > implented for these platforms simply disable the check.
> >
> > Signed-off-by: Imre Deak <imre.d...@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index c060496..ff26752 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -2099,7 +2099,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
> > * a plane. On ILK+ the pipe PLLs are integrated, so we don't
> > * need the check.
> > */
> > - if (!HAS_PCH_SPLIT(dev_priv->dev))
> > + if (HAS_GMCH_DISPLAY(dev_priv->dev))
> > if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
> > assert_dsi_pll_enabled(dev_priv);
> > else
> > @@ -4376,7 +4376,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc)
> > if (!crtc->state->enable || !intel_crtc->active)
> > return;
> >
> > - if (!HAS_PCH_SPLIT(dev_priv->dev)) {
> > + if (HAS_GMCH_DISPLAY(dev_priv->dev)) {
> > if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI))
> > assert_dsi_pll_enabled(dev_priv);
> > else
> >
>
> It looks like we're doing dsi calls, so this must at least apply to BYT,
> right? We might need more granularity here...
Yea, but VLV is covered by the GMCH check.
>
> Jesse
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
