From: Ville Syrjälä <[email protected]> Replace the hand roller intel_cdclk_ppc() with the real thing in intel_modeset_readout_hw_state().
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + drivers/gpu/drm/i915/display/intel_modeset_setup.c | 12 ++++-------- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index d3c5e3438d19..1d7ff2cbaebb 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2908,7 +2908,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state) } /* pixels per CDCLK */ -static int intel_cdclk_ppc(struct intel_display *display, bool double_wide) +int intel_cdclk_ppc(struct intel_display *display, bool double_wide) { return DISPLAY_VER(display) >= 10 || double_wide ? 2 : 1; } diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h index 1ff7d078b42c..a60cbf745ee2 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.h +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h @@ -22,6 +22,7 @@ struct intel_cdclk_config { bool joined_mbus; }; +int intel_cdclk_ppc(struct intel_display *display, bool double_wide); void intel_cdclk_init_hw(struct intel_display *display); void intel_cdclk_uninit_hw(struct intel_display *display); void intel_init_cdclk_hooks(struct intel_display *display); diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index e27a531e1aa2..14d829171c7d 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -854,14 +854,10 @@ static void intel_modeset_readout_hw_state(struct intel_display *display) * FIXME don't have the fb yet, so can't * use plane->min_cdclk() :( */ - if (plane_state->uapi.visible && plane->min_cdclk) { - if (crtc_state->double_wide || DISPLAY_VER(display) >= 10) - crtc_state->plane_min_cdclk[plane->id] = - DIV_ROUND_UP(crtc_state->pixel_rate, 2); - else - crtc_state->plane_min_cdclk[plane->id] = - crtc_state->pixel_rate; - } + if (plane_state->uapi.visible && plane->min_cdclk) + crtc_state->plane_min_cdclk[plane->id] = + DIV_ROUND_UP(crtc_state->pixel_rate, + intel_cdclk_ppc(display, crtc_state->double_wide)); drm_dbg_kms(display->drm, "[PLANE:%d:%s] min_cdclk %d kHz\n", plane->base.base.id, plane->base.name, -- 2.54.0
