From: Ville Syrjälä <[email protected]>
Apparently ever since the hardware started to do 2 pixels per CDCLK
(GLK+) we need an extra bump in CDCLK for certain horizontal scale
factors. The current BSpec formula for that is insufficient so instead
go for an empirically derived formula for now.
Ville Syrjälä (4):
drm/i915/cdclk: Use intel_cdclk_ppc() in
intel_modeset_readout_hw_state()
drm/i915/cdclk: Introduce HAS_2PPC()
drm/i915/cdclk: Introduce crtc_state->pixel_rate_cdclk
drm/i915/cdclk: Deal with 2 PPC hscale issues when calculating min
CDCLK
drivers/gpu/drm/i915/display/hsw_ips.c | 2 +-
drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 6 +-
drivers/gpu/drm/i915/display/intel_cdclk.h | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 32 ++++++++++-
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 7 +++
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 12 ++--
drivers/gpu/drm/i915/display/intel_plane.c | 55 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_plane.h | 5 ++
drivers/gpu/drm/i915/display/intel_sprite.c | 18 +++---
.../drm/i915/display/skl_universal_plane.c | 6 +-
13 files changed, 122 insertions(+), 29 deletions(-)
--
2.54.0
