> -----Original Message-----
> From: Intel-xe <intel-xe-boun...@lists.freedesktop.org> On Behalf Of Imre Deak
> Sent: Tuesday, 5 August 2025 10.37
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH 17/19] dmc/i915/tc: Report pin assignment NONE in TBT-alt mode
>
> The pin assignment is only relevant in case the PHY is owned by the display,
> that is in legacy and DP-alt mode. In TBT-alt mode the
> PHY is owned by the TBT FW/driver and so the pin assignment/configuration is
> managed by those components. A follow-up change
> will cache the pin assignment value in all the TypeC modes - querying this by
> calling
> get_pin_assignment() - prepare for that here, by reporting pin assignment
> NONE in the TBT-alt mode.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index cd4f0179b8cc4..d874217529951 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -287,6 +287,9 @@ get_pin_assignment(struct intel_tc_port *tc)
> u32 mask;
> u32 val;
>
> + if (tc->mode == TC_PORT_TBT_ALT)
> + return INTEL_TC_PIN_ASSIGNMENT_NONE;
> +
> if (DISPLAY_VER(display) >= 20) {
> reg = TCSS_DDI_STATUS(tc_port);
> mask = TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK;
> --
> 2.49.1
