> -----Original Message-----
> From: Intel-gfx <intel-gfx-boun...@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Tuesday, 5 August 2025 10.37
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: [PATCH 08/19] drm/i915/tc: Move asserting the power state after
> reading TCSS_DDI_STATUS
>
> Move asserting the expected TC cold power state and the read out register
> value right after reading the TCSS_DDI_STATUS
> register, similarly to how this is done with the other PORT_TX_DFLEXDPSP and
> PORT_TX_DFLEXPA1 PHY registers.
>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> Signed-off-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 4bd827c2187f5..de9129b65d34f 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -303,12 +303,16 @@ static int lnl_tc_port_get_max_lane_count(struct
> intel_digital_port *dig_port) {
> struct intel_display *display = to_intel_display(dig_port);
> enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base);
> + struct intel_tc_port *tc = to_tc_port(dig_port);
> intel_wakeref_t wakeref;
> u32 val, pin_assignment;
>
> with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
> val = intel_de_read(display, TCSS_DDI_STATUS(tc_port));
>
> + drm_WARN_ON(display->drm, val == 0xffffffff);
> + assert_tc_cold_blocked(tc);
> +
> pin_assignment =
> REG_FIELD_GET(TCSS_DDI_STATUS_PIN_ASSIGNMENT_MASK, val);
>
> @@ -375,8 +379,6 @@ static int get_max_lane_count(struct intel_tc_port *tc)
> if (tc->mode != TC_PORT_DP_ALT)
> return 4;
>
> - assert_tc_cold_blocked(tc);
> -
> if (DISPLAY_VER(display) >= 20)
> return lnl_tc_port_get_max_lane_count(dig_port);
>
> --
> 2.49.1
