On Wed, Feb 05, 2025 at 02:49:49PM +0200, Jani Nikula wrote:
> On Wed, 29 Jan 2025, Imre Deak <imre.d...@intel.com> wrote:
> > Add a helper to enable a port instead of open-coding it.
> >
> > Signed-off-by: Imre Deak <imre.d...@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 34 +++++++++++-------------
> > 1 file changed, 16 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 73702ccbb3773..ddb182550ad0f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3057,6 +3057,17 @@ mtl_ddi_disable_d2d_link(struct intel_encoder
> > *encoder)
> > port_name(port));
> > }
> >
> > +static void intel_enable_ddi_buf(struct intel_encoder *encoder, u32
> > buf_ctl)
>
> This is in line with current code, but I'd use intel_ddi_buf_enable()
> instead.
Okay, can rename this and accordingly in this patch rename
intel_disable_ddi_buf() to intel_ddi_buf_disable().
> > +{
> > + struct intel_display *display = to_intel_display(encoder);
> > + enum port port = encoder->port;
> > +
> > + intel_de_write(display, DDI_BUF_CTL(port), buf_ctl |
> > DDI_BUF_CTL_ENABLE);
> > + intel_de_posting_read(display, DDI_BUF_CTL(port));
> > +
> > + intel_wait_ddi_buf_active(encoder);
> > +}
> > +
> > static void intel_disable_ddi_buf(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > @@ -3375,7 +3386,7 @@ static void intel_ddi_enable_hdmi(struct
> > intel_atomic_state *state,
> > struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> > struct drm_connector *connector = conn_state->connector;
> > enum port port = encoder->port;
> > - u32 buf_ctl;
> > + u32 buf_ctl = 0;
> >
> > if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> >
> > crtc_state->hdmi_high_tmds_clock_ratio,
> > @@ -3440,8 +3451,6 @@ static void intel_ddi_enable_hdmi(struct
> > intel_atomic_state *state,
> > * is filled with lane count, already set in the crtc_state.
> > * The same is required to be filled in PORT_BUF_CTL for C10/20 Phy.
> > */
> > - buf_ctl = DDI_BUF_CTL_ENABLE;
> > -
> > if (dig_port->lane_reversal)
> > buf_ctl |= DDI_BUF_PORT_REVERSAL;
> > if (dig_port->ddi_a_4_lanes)
> > @@ -3467,9 +3476,7 @@ static void intel_ddi_enable_hdmi(struct
> > intel_atomic_state *state,
> > buf_ctl |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> > }
> >
> > - intel_de_write(dev_priv, DDI_BUF_CTL(port), buf_ctl);
> > -
> > - intel_wait_ddi_buf_active(encoder);
> > + intel_enable_ddi_buf(encoder, buf_ctl);
> > }
> >
> > static void intel_ddi_enable(struct intel_atomic_state *state,
> > @@ -3692,7 +3699,6 @@ static void mtl_ddi_prepare_link_retrain(struct
> > intel_dp *intel_dp,
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > struct intel_encoder *encoder = &dig_port->base;
> > - enum port port = encoder->port;
> > u32 dp_tp_ctl;
> >
> > /*
> > @@ -3726,15 +3732,11 @@ static void mtl_ddi_prepare_link_retrain(struct
> > intel_dp *intel_dp,
> > mtl_port_buf_ctl_program(encoder, crtc_state);
> >
> > /* 6.i Configure and enable DDI_CTL_DE to start sending valid data to
> > port slice */
> > - intel_dp->DP |= DDI_BUF_CTL_ENABLE;
> > if (DISPLAY_VER(display) >= 20)
> > intel_dp->DP |= XE2LPD_DDI_BUF_D2D_LINK_ENABLE;
> >
> > - intel_de_write(display, DDI_BUF_CTL(port), intel_dp->DP);
> > - intel_de_posting_read(display, DDI_BUF_CTL(port));
> > -
> > - /* 6.j Poll for PORT_BUF_CTL Idle Status == 0, timeout after 100 us */
> > - intel_wait_ddi_buf_active(encoder);
> > + intel_enable_ddi_buf(encoder, intel_dp->DP);
> > + intel_dp->DP |= DDI_BUF_CTL_ENABLE;
>
> I hate this last line, but that's another story.
Not sure why intel_dp->DP was added at all originally, I think the
register should be updated with RMW everywhere instead (removing
intel_dp->DP), I have a change in that direction in patch 12.
> Reviewed-by: Jani Nikula <jani.nik...@intel.com>
>
>
> > }
> >
> > static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
> > @@ -3743,7 +3745,6 @@ static void intel_ddi_prepare_link_retrain(struct
> > intel_dp *intel_dp,
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > struct intel_encoder *encoder = &dig_port->base;
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > - enum port port = encoder->port;
> > u32 dp_tp_ctl;
> >
> > dp_tp_ctl = intel_de_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state));
> > @@ -3766,11 +3767,8 @@ static void intel_ddi_prepare_link_retrain(struct
> > intel_dp *intel_dp,
> > (intel_tc_port_in_dp_alt_mode(dig_port) ||
> > intel_tc_port_in_legacy_mode(dig_port)))
> > adlp_tbt_to_dp_alt_switch_wa(encoder);
> >
> > + intel_enable_ddi_buf(encoder, intel_dp->DP);
> > intel_dp->DP |= DDI_BUF_CTL_ENABLE;
> > - intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> > - intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
> > -
> > - intel_wait_ddi_buf_active(encoder);
> > }
> >
> > static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
>
> --
> Jani Nikula, Intel
