It's almost impossible to compare timings between processors except in the 
context of a well defined benchmark; run a different benchmark and you get a 
different answer. A classic example is comparing a 370/158 to a 4341; use 
packed decimal heavily and you get one answer; use floating point heavily and 
you get the opposite answer.
IBM used to publish instruction timings, and with every new model the rules got 
more complicated. The last one that I saw was for the 370/168, and it was full 
of special cases. I suspect that an instruction timing manual for, e.g., a z14, 
would be bigger than PoOps, and not terribly useful even if you were certain 
that the code would only run on that model.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Brian Chapman <bchapma...@gmail.com>
Sent: Monday, August 12, 2019 8:48 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Instruction speeds

Hi everyone,

I did some searching, but I didn't find anything that really discussed this
on the topic that I'm interested. Is there anything published that compares
the cycle times of the most used instructions?

For example; moving an address between areas of storage. I would assume
that executing a LOAD and STORE would be much quicker than executing a MVC.

Or executing a LOAD ADDRESS to increment a register instead of ADD HALF
WORD.

Or does this really matter as much as ordering the instructions so they are
optimized for the pipeline?

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