At 17:55 -0500 on 11/29/2010, J R wrote about Re: IEFBR14:
> > Date: Mon, 29 Nov 2010 16:08:33 +0000
> From: [email protected]
> Subject: Re: IEFBR14
> To: [email protected]
>
> He meant three possible instructions that only occupied two
bytes of storage, I believe ("All three required the same memory
and processing cycles. They were equal and interchangeable."). LA
is a 4-byte instruction. A number of 4-byte instructions that were
available way back when comes to mind: e.g., L R15,=F'0'; LM
R15,R15,=F'0'.
>
> > Each byte of "core" storage in the 1960s was extremely scarce.
He also omitted Subtract Logical Register 15,15, which is a 2-byte
instruction and which executed slightly faster on a S/360 model 30
than Subtract Register.
Since load module sizes are multiples of 8 bytes, LA could be used
without going over the 8 byte minimum. Both L and LM need the =F'0'
and thus would produce a 10 byte Load Module. In this case the module
size (ie: The Core Usage) is only important if you are placing
IEFBR14 into the LPA - Otherwise both an 8 byte and 16 byte version
will fit into the partition and thus take the same amount of memory.
The instruction size DOES matter if you have a multi-instruction (ie:
normal) program where using a longer instruction in lieu of a shorter
one that can produce the same result can push the program size over a
size boundary and thus use "more" memory.
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