He meant three possible instructions that only occupied two bytes of storage, I
believe ("All three required the same memory and processing cycles. They were
equal and interchangeable."). LA is a 4-byte instruction. A number of 4-byte
instructions that were available way back when comes to mind: e.g., L
R15,=F'0'; LM R15,R15,=F'0'.
Each byte of "core" storage in the 1960s was extremely scarce. He also omitted
Subtract Logical Register 15,15, which is a 2-byte instruction and which
executed slightly faster on a S/360 model 30 than Subtract Register.
But you are right; there is no Clear Register instruction.
Bill Fairchild
Rocket Software
-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf Of
Shmuel Metz (Seymour J.)
Sent: Monday, November 29, 2010 7:25 AM
To: [email protected]
Subject: Re: IEFBR14
In <listserv%[email protected]>, on 11/28/2010
at 10:57 PM, Avram Friedman <[email protected]> said:
>http://www.miketaylor.org.uk/tech/oreilly/more-iefbr14.html >From one
>of the two IBM co-authors
>Note not part of the original OS spec added as an after thought
Given the following quote, his memory is not reliable:
There were three possible instructions that could be used to
zero R15: ``Clear Register R15'', ``Subtract Register R15,R15'',
and ``Exclusive Or Register R15,R15''.
There is, of course, no "Clear Register" instruction. The third
obvious instruction is LA.
--
Shmuel (Seymour J.) Metz, SysProg and JOAT
ISO position; see <http://patriot.net/~shmuel/resume/brief.html>
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)
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