I am trying to override a target that has a general definition in an included Makefile with a more specific one. But it seems that the override only happens if the overriding target has a recipe?
I.e:
Makefile.mk:
1 foo.gz:
2 echo "foo" | gzip > $@
Makefile:
1 include Makefile.mk
2
3 %.gz: %
4 rm -f $@
5 gzip $<
6
7 foo:
8 echo "better foo" > $@
9
10 foo.gz: foo
My expectation is that the foo.gz target on line 10 of Makefile
overrides the one on line 1 of Makefile.mk, but it doesn't unless I
make it:
foo.gz: foo
rm -f $@
gzip $<
by redundantly adding the %.gz: % recipe to it.
Is this intended behaviour?
Also, is there a way to suppores of the "warning: overriding recipe for
target" messages that make emits? I realize they can be useful when
you inadvertently override a target, but it would be nice to indicate
in the Makefile that you understand you are overriding a target and
don't want the warning.
Cheers,
b.
signature.asc
Description: This is a digitally signed message part
_______________________________________________ Help-make mailing list Help-make@gnu.org https://lists.gnu.org/mailman/listinfo/help-make
