On 07/27/2015 03:39 PM, Paul Smith wrote:
> On Mon, 2015-07-27 at 13:50 -0500, Larry Evans wrote:
>> Thanks Paul.  It works; however, what I really
>> want is to use the compiler to compile a source file to
>> and object file.
> 
> Well, it usually works best to ask the question you want the answer to,
> rather than a different question :-).
> 
>> How should I modify this 2nd version of the Makefile to make it compile
>> to produce the .o and not the a.out file?  BTW, I'd rather not
>> hardcode the -c into compile command because the actual args to the
>> compile command depend on the compiler.  Also, I'd like the output
>> object file name to be $(MAIN).gcc.o instead of just $(MAIN).o.
> 
> I don't really understand this, at all.  Why do you have a loop in your
> recipe?  Can you provide a more realistic example?  Or else maybe
> provide some higher-level explanation of what you're trying to do?
> 
> In your original question I thought maybe you have multiple compilers
> and you wanted to write a "show info" type rule to show the paths to all
> of them.  But in this version of the makefile you're actually trying to
> compile code, so I don't understand why you're trying to loop through
> multiple compilers...?
> 
> Are you trying to compile the same file with different compilers, or
> something?
> 
Yes.

The attached Makefile summarizes methods tried and the reason
they failed or succeeded.  The last method, the one with
target=compiles.def, uses define..endef and succeeds.

-regards,
Larry

COMPILE.gcc=g++ -c
COMPILE.clang=clang -c
MAIN=test
COMPILERS=gcc clang

#The following fails because $(COMPILE.$HOW_CXX)
#doesn't have value defined in this Makefile
#for reason pointed out by Paul Smith here:
#
#  http://lists.gnu.org/archive/html/help-make/2015-07/msg00016.html
#
compiles.for_compilers:
        for HOW_CXX in $(COMPILERS) ; do \
          $(COMPILE.$$HOW_CXX) $(MAIN).cpp -o $(MAIN).$$HOW_CXX.o  ; \
        done ;

#The following fails because $(COMPILE.$C)
#has multiple space delimited tokens.
compiles.for_each:
        @echo "COMPILE.gcc=" $(COMPILE.gcc)
        for HOW_CXX in $(foreach C,$(COMPILERS),$(COMPILE.$C)) ; do \
          echo "HOW_CXX=" $$HOW_CXX ; \
          rm -f a.out $(MAIN).o ; \
          date ; \
          $$HOW_CXX $(MAIN).cpp ; \
          ls -l a.out $(MAIN).o ; \
        done ;

#The following does work by duplicating code
#for each compiler using define...endef:
define COMPILE.MAIN
compile.$(1):
        $$(COMPILE.$(1)) -c $(MAIN).cpp -o $(MAIN).$(1).o
endef

$(foreach compiler, $(COMPILERS),$(eval $(call COMPILE.MAIN,$(compiler))))

compiles.def: $(addprefix compile.,$(COMPILERS))

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