Hi Andreas,
I am attaching two memory controller to the system as per your advice
system.ddr3_ctl and system.pcm_ctl. I found the following details
inside FSConfig.py
//makeX86System method
self.physmem = SimpleDDR3(range = AddrRange('1GB'))
self.mem_ranges = [self.physmem.range]
//connectX86ClassicSystem method
x86_sys.membus = MemBus()
x86_sys.physmem.port = x86_sys.membus.master
x86_sys.bridge.slave = x86_sys.membus.master
x86_sys.apicbridge.master = x86_sys.membus.slave
x86_sys.system_port = x86_sys.membus.slave
I am new to Gem5 memory model. Please can you give me hints how to change
above initialization to two memory controllers and attach them to the bus.
Thanks.
Best Regards, Ahmad
On 24 October 2013 19:28, Andreas Hansson <[email protected]> wrote:
> Hi Ahmad,
>
> You can instantiate as many controller as you want, all you have to do
> is edit the python files. You can either try and add it as an option to
> fs.py or similar, or manually create a system in a separate .py file.
>
> You can simply do system.ddr3_ctrl = SimpleDDR3() and system.pcm_ctrl =
> SimplePCM() (you have to create the latter class). You pass the address
> range as a parameter to each controller. When you connect them to the bus
> they will automatically be updating the address map in the bus.
>
> Good luck.
>
> As a final note, please stick to the mailing list :-)
>
> Andreas
>
> From: Ahmad Hassan <[email protected]>
> Date: Wednesday, 23 October 2013 20:29
> To: Andreas Hansson <[email protected]>
> Subject: Re: Running two SimpleDram instances simulataniously
>
> Or more simply, how would it be possible to use both "SimpleLPDDR2_S4"
> and "SimpleDDR3" simultaneously. I will redirect some virtual addresses
> to SimpleLPDDR2_S4 and some to SimpleDDR3.
>
> Thanks.
>
> kind Regards, Ahmad
>
>
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