Hi Andreas,
To make sure it is not caused by my local changes, I just cloned the fresh
revison 9644:07352f119e48 and defined two memory controllers as:
self.physmem = SimpleDDR3(range = AddrRange(start="0GB", size="2GB"))
self.physmem2 = SimpleDDR3(range = AddrRange(start="50GB",size="1GB"))
self.mem_ranges = [self.physmem.range,self.physmem2.range]
Again, I see the same error where linux boot-up fails while accessing
physical address: 3217031168. It seems that guest OS assumes that All 3GB
space is contiguous.
I don't know why it worked last week.
Thanks for the help.
Best Regards, Hassan
On 28 November 2013 14:50, Ahmad Hassan <[email protected]> wrote:
> Hi Andreas,
>
> I assume so. I get this 'segmentation fault' while booting
> linux: ./build/X86/gem5.opt configs/example/fs.py
> --kernel=x86_64-vmlinux-2.6.22.9.smp
>
> But I think, I booted the linux last week with similar configuration and I
> think it worked fine. It seems bit strange to me that I am seeing this
> segmentation fault now.
>
> Best Regards, Hassan
>
>
> On 28 November 2013 13:53, Andreas Hansson <[email protected]>wrote:
>
>> Hi Hassan,
>>
>> What is it that is assuming that the memory is contiguous? The guest OS?
>>
>> Andreas
>>
>> From: Ahmad Hassan <[email protected]>
>> Reply-To: gem5 users mailing list <[email protected]>
>> Date: Thursday, 28 November 2013 06:43
>>
>> To: gem5 users mailing list <[email protected]>
>> Subject: Re: [gem5-users] Running two SimpleDram instances
>> simulataniously
>>
>> Hi Andreas,
>>
>> I have defined two memory controllers:
>>
>> self.dram2_ctl = SimpleDDR3(range =
>> AddrRange(start='0MB',size='3GB'))
>> self.dram1_ctl = SimpleDDR3(range =
>> AddrRange(start='10GB',size='16GB'))
>>
>> But I am getting exception in findPort method where it raises because
>> it tries to access physical address 6438256672 for membus
>>
>> DPRINTF(BusAddrRanges, "Unable to find destination for addr %#llx, "
>> "will use default port\n", addr);
>>
>> As a result of that, I get segmentation fault during memcpy operation
>> in abstract_mem.cc:access
>> This error is happening because system is assuming that all the 19GB of
>> physical memory is contiguous. Please can you advise me how to fix this.
>> Thanks.
>>
>> Best Regards, Hassan
>>
>>
>>
>>
>> On 31 October 2013 18:00, Andreas Hansson <[email protected]>wrote:
>>
>>> Hi Ahmad,
>>>
>>> If you change the bus code then every bus in the system will do this,
>>> including the I/O bus. I suspect this is the reason for your error. You can
>>> keep on the hackish path and add a name check to only do this for the
>>> membus (or add a parameter to the bus and change the MemBus instance), or
>>> preferably get of the hackish path and rely on physical addresses and sort
>>> out your “placement” by assigning the appropriate physical addresses in
>>> your TLBs (or preferably in the OS).
>>>
>>> Red pill or blue pill.
>>>
>>> Andreas
>>>
>>> From: Ahmad Hassan <[email protected]>
>>> Reply-To: gem5 users mailing list <[email protected]>
>>> Date: Thursday, 31 October 2013 16:51
>>>
>>> To: gem5 users mailing list <[email protected]>
>>> Subject: Re: [gem5-users] Running two SimpleDram instances
>>> simulataniously
>>>
>>> Hi Andreas,
>>>
>>> In my system:
>>> DDR3 memory controller: Port ID 0 //2GB capacity
>>> DDR2 memory controller: Port ID 1 //1GB capacity
>>>
>>> So I want to do the following:
>>>
>>> When the packet comes into bus.cc:findPort then it searches for
>>> packet's physical address in the registered portMap of address ranges and
>>> returns the appropriate port ID. I don't want to do this. Instead, I want
>>> to select port based on the virtual address. I have list of virtual
>>> addresses say V=[V1....Vn] and I want to redirect all the packets with
>>> virtual address within set 'V' to DDR3 Port 0 and all other memory packets
>>> to the DDR2 port 1.
>>>
>>> In order to achieve this, I changed bus.cc:findPort as:
>>>
>>> if (search(V, pkt->req->getVaddr()) == true)
>>> dest_id = 0;
>>> else
>>> dest_id = 1;
>>>
>>> After that, abstract_mem.cc:access complained that the packet address
>>> doesn't belong to the range of PORT '1'. Just as a quick hack, I changed it
>>> as:
>>>
>>> old: uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start();
>>> new: uint8_t *hostAddr = pmemAddr + pkt->getAddr() - 0; // Port ID 0
>>> range starts with '0'
>>>
>>> Now the linux starts booting but during the half way, it throws this
>>> cmos assertion. Please can you suggest the clean or right way of
>>> implementing what I am trying to achieve.
>>>
>>> Thanks a lot
>>>
>>> kind Regards, Ahmad
>>>
>>>
>>> On 31 October 2013 16:25, Andreas Hansson <[email protected]>wrote:
>>>
>>>> Hi Ahmad,
>>>>
>>>> I could be wrong, but judging by your mail, I get the impression that
>>>> you’re overriding the address decoding. That is essentially saying “If I
>>>> send requests for address X to address Y, why do things not work?”. I would
>>>> be very surprised if it did, as two addresses will now map to the same
>>>> location :-). Perhaps I’m not understanding what you’ve changed.
>>>>
>>>> Andreas
>>>>
>>>> From: Ahmad Hassan <[email protected]>
>>>> Reply-To: gem5 users mailing list <[email protected]>
>>>> Date: Thursday, 31 October 2013 16:12
>>>>
>>>> To: gem5 users mailing list <[email protected]>
>>>> Subject: Re: [gem5-users] Running two SimpleDram instances
>>>> simulataniously
>>>>
>>>> HI Andreas,
>>>>
>>>> I have connected two memory controllers and I can see the following
>>>> two port IDs and their physical address ranges:
>>>>
>>>> Adding range [0 : 2147483647] for id 0 system.membus // 2GB
>>>> memory
>>>> Adding range [2147483648 : 3221225471] for id 1 system.membus
>>>> //1GB memroy
>>>>
>>>> Inside findPort method of bus.cc, if I assign the packet of port id
>>>> '0' to port id '1' then I get the following assertion error. This happens
>>>> in half way through the linux boot up:
>>>>
>>>> gem5.opt: build/X86/dev/x86/cmos.cc:70: virtual Tick
>>>> X86ISA::Cmos::write(PacketPtr): Assertion `pkt->getSize() == 1' failed.
>>>>
>>>> Please do you know what is causing that? Also I had to disable
>>>> assertion in abstract memory which validates that the packet's physical
>>>> address in with in the range of memory controller.
>>>>
>>>> Thanks.
>>>>
>>>> kind Regards, Ahmad
>>>>
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>> information in any medium. Thank you.
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>> Registered in England & Wales, Company No: 2557590
>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ,
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