Much awaited!

I've bumped the patch as I forgot to check if there was already writeEvent 
scheduled. Please give it another go and if you're happy then a "Ship it" would 
be great :)

Andreas

From: Anthony Gutierrez <atgut...@umich.edu<mailto:atgut...@umich.edu>>
Reply-To: gem5 users mailing list 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Date: Wednesday, 7 November 2012 12:46
To: gem5 users mailing list <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Subject: Re: [gem5-users] Simple DRAM not draining when cores do not switch L1's


Yes. And I hope to add a draining regression soon.

On Nov 7, 2012 3:29 AM, "Andreas Hansson" 
<andreas.hans...@arm.com<mailto:andreas.hans...@arm.com>> wrote:
Hi Tony,

Could you give this one a go: http://reviews.gem5.org/r/1535/

It seems to solve the problem on my end.

Andreas

From: Anthony Gutierrez 
<atgut...@umich.edu<mailto:atgut...@umich.edu><mailto:atgut...@umich.edu<mailto:atgut...@umich.edu>>>
Reply-To: gem5 users mailing list 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org><mailto:gem5-users@gem5.org<mailto:gem5-users@gem5.org>>>
Date: Monday, 5 November 2012 21:08
To: 
"gem5-users@gem5.org<mailto:gem5-users@gem5.org><mailto:gem5-users@gem5.org<mailto:gem5-users@gem5.org>>"
 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org><mailto:gem5-users@gem5.org<mailto:gem5-users@gem5.org>>>
Subject: Re: [gem5-users] Simple DRAM not draining when cores do not switch L1's

NOTE, the problem with this trace is that it hangs while trying to drain 
because the physmem never signals drained; it's dramWriteQueue is never emptied 
and only refreshes forever.

-Tony

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