Hi Tony, Could you give this one a go: http://reviews.gem5.org/r/1535/
It seems to solve the problem on my end. Andreas From: Anthony Gutierrez <atgut...@umich.edu<mailto:atgut...@umich.edu>> Reply-To: gem5 users mailing list <gem5-users@gem5.org<mailto:gem5-users@gem5.org>> Date: Monday, 5 November 2012 21:08 To: "gem5-users@gem5.org<mailto:gem5-users@gem5.org>" <gem5-users@gem5.org<mailto:gem5-users@gem5.org>> Subject: Re: [gem5-users] Simple DRAM not draining when cores do not switch L1's NOTE, the problem with this trace is that it hangs while trying to drain because the physmem never signals drained; it's dramWriteQueue is never emptied and only refreshes forever. -Tony -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
