Would you mind posting a patch?
Thanks,
Ali
On 19.09.2012
14:43, nathanael.premill...@irisa.fr wrote:
> Hi Ali,
>
> After some
testing it seems that removing the flag does not cause any
> problems.
Moreover it solve my problem, so it's perfect :)
>
> Thanks,
>
>
Nathanaël
>
> Le 18/09/2012 15:55, Ali Saidi a écrit :
>
>> Hi
Nathanaël, I'd guess it shouldn't be. I think it was that way from when
the ITSTATE bits were changed in the CPSR instruction. You should be
able to remove the "IsControl" flag and I think it will work. Want to
give it a try? Thanks, Ali On 18.09.2012 09:14,
nathanael.premill...@irisa.fr [3]wrote:
>>
>>> Hi All, It seems that
instructions that writes into some control registers (CPSR and CPACR)
are set as control instructions (flag IsControl is set). This is due to
the definition and the use of cntrlReg in src/arch/arm/isa/operands.isa:
(l.120) def cntrlReg(idx, id = srtNormal, type = 'uw'): return
('ControlReg', type, idx, (None, None, 'IsControl'), id) (l.238) 'Cpsr':
cntrlReg('MISCREG_CPSR', srtCpsr), 'CpsrQ': cntrlReg('MISCREG_CPSR_Q',
srtCpsr), (l.246) 'Cpacr': cntrlReg('MISCREG_CPACR'), I was thinking
that IsControl flag is only set for branch instruction i.e. instructions
that modify the PC. Am I wrong? Thanks, Nathanaël
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