[gem5-users] ARM: instructions that writes into CPSR and CPACR set as control instructions

Tue, 18 Sep 2012 06:14:50 -0700 

Hi All,
It seems that instructions that writes into some control registers (CPSR and CPACR) are set as control instructions (flag IsControl is set). This is due to the definition and the use of cntrlReg in src/arch/arm/isa/operands.isa: 

 (l.120)
def cntrlReg(idx, id = srtNormal, type = 'uw'):
    return ('ControlReg', type, idx, (None, None, 'IsControl'), id)

(l.238)
    'Cpsr': cntrlReg('MISCREG_CPSR', srtCpsr),
    'CpsrQ': cntrlReg('MISCREG_CPSR_Q', srtCpsr),

(l.246)
    'Cpacr': cntrlReg('MISCREG_CPACR'),


I was thinking that IsControl flag is only set for branch instruction 
i.e. instructions that modify the PC. Am I wrong?



Thanks,

Nathanaël
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