On Wed, Jun 12, 2019 at 10:52:42AM +0000, Joel Hutton wrote: > A summary of the behaviour is: > when combining A -> B, the register equivalence notes of A are checked, the > register notes of B are not checked. > > Is this expected behaviour?
Yes. If it would use the notes on B to make the new insns, it would not need A *at all*. This does not make much sense. A worse problem is that very often it will end up with an insn that cannot match, if it did use the note on i3. combine does not try all ways it can transform your code, so it should use the more promising ways. > Combine does not check the REG_EQUAL note on insn 12, and does not try the > equivalent pattern, using a const_vector instead of register 99. > > Trying 10 -> 12: > 10: r97:V4SF=float(r96:V4SI) > REG_DEAD r96:V4SI > 12: r98:V4SF=r97:V4SF*r99:V4SF > REG_DEAD r97:V4SF > REG_EQUAL r97:V4SF*const_vector > Failed to match this instruction: > (set (reg:V4SF 98 [ D.3422 ]) > (mult:V4SF (float:V4SF (reg:V4SI 96 [ D.3420 ])) > (reg:V4SF 99))) If you want the const_vector for r97, you should look at the combination that tries *that* insn together with 10 and 12. Did it try that? Why not? Segher
