Found, what it seems to be the most recent arc branch, arc-4_4-20090909-branch/. http://gcc.gnu.org/viewvc/gcc/branches/arc-4_4-20090909-branch/
Paulo Matos > -----Original Message----- > From: amyl...@spamcop.net [mailto:amyl...@spamcop.net] > Sent: 17 May 2013 15:12 > To: Paulo Matos > Cc: gcc@gcc.gnu.org > Subject: Re: Pushing the limits on vector modes > > Quoting Paulo Matos <pma...@broadcom.com>: > > > Hello, > > > > I am trying to model a predicate register mode that acts like a > > vector. We have a few predicate registers that have 8 bits in size > > but they are set accordingly to the mode of operation (not > > necessarily a comparison). Word size is 64. > > Yes need some surgery to the mode generator machinery. I had the same > problem with the mxp port, which you can still find in older ARC > branches.