On 10/21/2011 05:49 PM, paul_kon...@dell.com wrote: >> There are lots of parts of the compiler that don't optimize well when an >> insn has more than one output. For the normal insn, just clobber the flags; >> don't include a second SET. > > Yes, but... isn't the whole point of CC modeling that you can take advantage > of the CC left around by an instruction? Typically in machines with > condition codes, you can eliminate test instructions (compare with zero) if > the previous instruction has that variable as its output. But if we're > discouraged from writing insns with CC outputs as normal practice, and if the > compiler doesn't handle such constructs well in optimization, what then?
The solution is to have *two* insn patterns, one with a set of the flags and one with only a clobber. Have a look through i386.md and how the flags register is handled there. r~
