On Fri, Aug 12, 2011 at 12:17 PM, Rohit Arul Raj <rohitarul...@gmail.com> wrote:
> Hello All,
>
> I am working on 32-bit target with gcc 4.6.0. I need some help on the
> following:
>
> For my target, If my CCR register is set, all the arithmetic
> instructions update the CC register else the don't update.
> Setting the CCR register is done by a built-in function.
>
> Can any one help how to proceed with this? or any other target where a
> similar case has been implemented?
>
> Thanks,
> Rohit
>
Adding more info:
Note: There is 2 cycle latency between compare and branch instructions.
A) Without CCR register being set.
cmp insn
branch insn
Here i can insert any arithmetic instruction e.g. 'addsi'
in-between 'cmp' and 'branch' as the CC register doesn't get modified.
B) With CCR register being set.
Here i cannot insert any arithmetic instruction e.g. 'addsi'
in-between 'cmp' and 'branch' as the CC register will get modified.
~Rohit
