On 04/19/10 06:58, Frank Isamov wrote:
Hi,
My architecture supports instructions with two parallel side effects.
For example, addition and subtraction can be done in parallel:
(define_insn "assi6"
[(parallel [
(set (match_operand:SI 0 "register_operand" "=r")
(minus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r")))
(set (match_operand:SI 3 "register_operand" "=r")
(plus:SI (match_operand:SI 4 "register_operand" "r")
(match_operand:SI 5 "register_operand" "r")))
])]
""
"as\t%5, %4, %3, %2, %1, %0 %!"
)
This instruction is not chosen at ‘combine’ time even if ‘plus’ and
‘minus’ instructions are located one after other. That it is,
probably, there is no data dependency between them.
combine requires a data dependency, so for this situation, combine isn't
going to help. The easy solution is to create a peephole. You can
also create a machine dependent reorg pass to detect more of these
opportunities.
Jeff
