Thanks.  I'm going to work around it for now by post correcting X -
it's a hack but I'm in the early stages of the port so I can get back
to it later.

-- Michael

2009/4/28 Ian Lance Taylor <i...@google.com>:
> Michael Hope <micha...@juju.net.nz> writes:
>
>> My last RTL dump was wrong due to it hitting a zero extend from memory
>> optimisation.  However, this time test.i.136r.subreg1 contains:
>
>> (insn 7 4 8 2 loads.c:5 (set (reg:SI 32)
>>         (reg/v/f:SI 30 [ p ])) 6 {movsi} (nil))
>>
>> (insn 8 7 9 2 loads.c:5 (set (reg:QI 31)
>>         (mem:QI (post_inc:SI (reg:SI 32)) [0 S1 A8])) 0 {movqi_mem}
>> (expr_list:REG_INC (reg:SI 32)
>>         (nil)))
>
>> This is correct so far, but the next step in test.i.138r.cse1 contains:
>
>> (insn 7 4 8 2 loads.c:5 (set (reg/f:SI 32 [ p ])
>>         (reg/v/f:SI 30 [ p ])) 6 {movsi} (nil))
>>
>> (insn 8 7 9 2 loads.c:5 (set (reg:QI 31)
>>         (mem:QI (post_inc:SI (reg/v/f:SI 30 [ p ])) [0 S1 A8])) 0
>> {movqi_mem} (expr_list:REG_INC (reg/f:SI 32 [ p ])
>>         (nil)))
>
> This substitution is clearly invalid.  So there is a bug in CSE.  Most
> likely this bug has not been noticed before because POST_INC and friends
> are normally inserted by the inc_dec pass which runs after CSE.
>
> It may be that all that is needed is to change the cse_insn function to
> look for REG_INC notes.
>
> Ian
>

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