On Fri, Jun 27, 2008 at 03:52:22PM +0530, Mohamed Shafi wrote: > Hello all, > > For the 16-bit target that i porting now to gcc 4.1.2 doesn't have any > branch instructions. It only has jump instructions. For comparison > operation it has this instruction: > > if cond Rx Ry > execute this insn > > So compare and branch is implemented as > > if cond Rx Ry > jmp Label > > If the condition in the 'if' instruction is satisfied the processor > will execute the next instruction or it will replace with a nop. So > this means that i can instructions similar to: > > if eq Rx, Ry > add Rx, Ry > add Rx, 2 > > This is similar to conditional execution. This way any instruction can > be executed conditionally. But this is different from normal. Normally > the comparison operations set the status flags. An instruction gets > conditionally executed based on these flags. This means that GCC can > schedule instructions between the comparison instruction and the > conditional instruction, provided none of the scheduled instructions > are altering the status flags. This is not possible in my case as > there shouldn't be any instruction between 'if eq Rx, Ry' and 'add Rx, > Ry' and this is not as such an comparison operation and 'if' > instruction doesn't set any status flags. > > Will it be possible to implement this in the Gcc backend ? > Does any other targets have similar instructions?
This is do-able. The usual method is to store the operands to the comparison in global variables, and then when you issue the branch, conditional move, etc. use the global variables, and recreate appropriate branch. Be sure to mark the global variables with the GTY(()) macro. I would suggest having the JUMP insn patterns look like other ports, using the IF_THEN_ELSE pattern, and then add the full COND_EXEC support. -- Michael Meissner email: [EMAIL PROTECTED] http://www.the-meissners.org
