On Tue, Apr 1, 2008 at 2:10 AM, Jim Wilson <[EMAIL PROTECTED]> wrote: > Mohamed Shafi wrote: > > For the source or the destination register Rd/Ra, the restriction is > > that it should be one more than the base register . So the following > > instructions are valid: > > GCC doesn't provide any easy way for the source address to depend on the > destination address, or vice versa. > > One thing you could try is generating a double-word pseudo-reg at RTL > expand time, and then using subreg 0 for the source and subreg 1 for the > dest (or vice versa depending on endianness/word order). This will get > you a register pair you can use from the register allocator. This > doesn't help at reload time though. > > You probably have to define a constraint for every register, and then > write an alternative for every register pair matching the correct even > register with the correct odd register. That gets you past reload. > > Another alternative might be to have a pattern (e.g. reload_insi) that > generates secondary reloads that request the register pair you need. > This is unlikely to get good code, but would not be hard to do. > Thank you for your reply.
What i did was to have 8 register class with each class having two registers, an even register and an odd register then in define expand look for the register indirect with offset addressing mode and emit gen_store_offset or gen_load_offset pattern if the addressing mode is found. In the pattern i will have the 8 similar constraints for the base register and the source/destination register. This way gcc will automatically do reload if its required in order to match the constraints. (store,load)_offset pattern should come above the normal load or store pattern as the order of the patterns are important. This is working for me now. Won't this be a better solution ? Regards, Shafi
