"Naveen H.S." <[EMAIL PROTECTED]> wrote:
> The option "-mfmovd" is enabled by default for SH2A which generates
> "fmov.d" instruction by default. However, SH4 and SH4A targets
> generates "fmov.d" instruction only after passing the option "-mfmovd".
fmov.d has a byte order problem in little endian. I guess that
-mfmovd is default on SH2A because SH2A is big endian only,
though I know nothing about the history of SH2A support.
> The following testcase results in address error at "fmov.d" instruction.
I can't reproduce it with my unified tree&sim and couldn't find
any description for 8-byte alignment restriction for double
data on memory in my SH2A manual, though I could be wrong about
that.
Have you got this error on the real SH2A-FPU hardware?
Regards,
kaz
